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zbSLH(lkPev^R+f48zCBIHY5(=9HCRxxT+BC9bOeyps)cj4Ohh`0_ z7)5{K*<2x_(VH*NbEaiS3+aA7Fwwz2a#YR<6_gSZnotF4_gH8-cqqlai^_UOn_10P@F_^a2J<)!t71!N_p z`2qX_Kz=S6J`lGwkQ?yp7Z>pH!y~{eEh;Q2%PYypC%_E^0r;hPxdD +#include + +void adc_init(void) +{ + // Clock configuration + RCC->APB2ENR |= 0x00000400; + RCC->APB1ENR |= 0x00000020; + + // Analog pin configuration + GPIOF->MODER |= 0x00003000; + + // ADC configuration + ADC3->CR1 |= 0x02000000; // Resolution + // -> 8 Bit, + // scan mode + // -> disabled + ADC3->CR2 |= 0x00000002; // Continous + // conversion + // mode -> + // enabled + + // Enable ADC conversion + ADC3->CR2 |= 0x00000001; // ADC3 enable + + // Select the channel to be read from + ADC3->SMPR2 |= 0x00006000; // Channel 4 sampling + // time -> 144 cycles + ADC3->SQR3 |= 0x00000004; // Channel 4 rank + // -> 1 (?) +} + +uint8_t adc_get_value(void) +{ + // Start the conversion + ADC3->CR2 |= 0x40000000; + + // Wait till conversion is finished + while (!ADC3->SR & 0x00000002) ; + + // Return the converted data + return (uint8_t)ADC3->DR & 0x000000ff; +} diff --git a/project/app/struct_code.s b/project/app/struct_code.s new file mode 100644 index 0000000..89f0b69 --- /dev/null +++ b/project/app/struct_code.s @@ -0,0 +1,117 @@ +; ------------------------------------------------------------------ +; -- _____ ______ _____ - +; -- |_ _| | ____|/ ____| - +; -- | | _ __ | |__ | (___ Institute of Embedded Systems - +; -- | | | '_ \| __| \___ \ Zurich University of - +; -- _| |_| | | | |____ ____) | Applied Sciences - +; -- |_____|_| |_|______|_____/ 8401 Winterthur, Switzerland - +; ------------------------------------------------------------------ +; -- +; -- main.s +; -- +; -- CT1 P08 "Strukturierte Codierung" mit Assembler +; -- +; -- $Id: struct_code.s 3787 2016-11-17 09:41:48Z kesr $ +; ------------------------------------------------------------------ +;Directives + PRESERVE8 + THUMB + +; ------------------------------------------------------------------ +; -- Address-Defines +; ------------------------------------------------------------------ +; input +ADDR_DIP_SWITCH_7_0 EQU 0x60000200 +ADDR_BUTTONS EQU 0x60000210 + +; output +ADDR_LED_31_0 EQU 0x60000100 +ADDR_7_SEG_BIN_DS3_0 EQU 0x60000114 +ADDR_LCD_COLOUR EQU 0x60000340 +ADDR_LCD_ASCII EQU 0x60000300 +ADDR_LCD_ASCII_BIT_POS EQU 0x60000302 +ADDR_LCD_ASCII_2ND_LINE EQU 0x60000314 + + +; ------------------------------------------------------------------ +; -- Program-Defines +; ------------------------------------------------------------------ +; value for clearing lcd +ASCII_DIGIT_CLEAR EQU 0x00000000 +LCD_LAST_OFFSET EQU 0x00000028 + +; offset for showing the digit in the lcd +ASCII_DIGIT_OFFSET EQU 0x00000030 + +; lcd background colors to be written +DISPLAY_COLOUR_RED EQU 0 +DISPLAY_COLOUR_GREEN EQU 2 +DISPLAY_COLOUR_BLUE EQU 4 + +; ------------------------------------------------------------------ +; -- myConstants +; ------------------------------------------------------------------ + AREA myConstants, DATA, READONLY +; display defines for hex / dec +DISPLAY_BIT DCB "Bit " +DISPLAY_2_BIT DCB "2" +DISPLAY_4_BIT DCB "4" +DISPLAY_8_BIT DCB "8" + ALIGN + +; ------------------------------------------------------------------ +; -- myCode +; ------------------------------------------------------------------ + AREA myCode, CODE, READONLY + ENTRY + + ; imports for calls + import adc_init + import adc_get_value + +main PROC + export main + ; 8 bit resolution, cont. sampling + BL adc_init + BL clear_lcd + +main_loop +; STUDENTS: To be programmed + + + + +; END: To be programmed + B main_loop + +clear_lcd + PUSH {R0, R1, R2} + LDR R2, =0x0 +clear_lcd_loop + LDR R0, =ADDR_LCD_ASCII + ADDS R0, R0, R2 ; add index to lcd offset + LDR R1, =ASCII_DIGIT_CLEAR + STR R1, [R0] + ADDS R2, R2, #4 ; increas index by 4 (word step) + CMP R2, #LCD_LAST_OFFSET ; until index reached last lcd point + BMI clear_lcd_loop + POP {R0, R1, R2} + BX LR + +write_bit_ascii + PUSH {R0, R1} + LDR R0, =ADDR_LCD_ASCII_BIT_POS + LDR R1, =DISPLAY_BIT + LDR R1, [R1] + STR R1, [R0] + POP {R0, R1} + BX LR + + ENDP + ALIGN + + +; ------------------------------------------------------------------ +; End of code +; ------------------------------------------------------------------ + END diff --git a/project/strukt_code.uvoptx b/project/strukt_code.uvoptx new file mode 100644 index 0000000..95d429c --- /dev/null +++ b/project/strukt_code.uvoptx @@ -0,0 +1,225 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc; *.md + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + Target 1 + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\build\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + ST-LINKIII-KEIL_SWO + -U -O206 -S0 -C0 -A0 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_2048.FLM -FS08000000 -FL0200000 -FP0($$Device:CT_Board_HS14_M0$Flash\STM32F4xx_2048.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_2048 -FS08000000 -FL0200000 -FP0($$Device:CT_Board_HS14_M0$Flash\STM32F4xx_2048.FLM)) + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + Source Group 1 + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 1 + 0 + 0 + .\app\adc.c + adc.c + 0 + 0 + + + 1 + 2 + 2 + 0 + 0 + 0 + .\app\struct_code.s + struct_code.s + 0 + 0 + + + + + ::Device + 1 + 0 + 0 + 1 + + + + ::HAL + 1 + 0 + 0 + 1 + + +
diff --git a/project/strukt_code.uvprojx b/project/strukt_code.uvprojx new file mode 100644 index 0000000..849e083 --- /dev/null +++ b/project/strukt_code.uvprojx @@ -0,0 +1,524 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + Target 1 + 0x4 + ARM-ADS + 6180000::V6.18::ARMCLANG + 6180000::V6.18::ARMCLANG + 1 + + + CT_Board_HS14_M0 + STMicroelectronics + InES.CTBoard14_DFP.4.0.2 + https://ennis.zhaw.ch/pack/ + IROM(0x08000000,0x200000) IRAM(0x20000000,0x30000) IRAM2(0x10000000,0x10000) CPUTYPE("Cortex-M0") CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_2048 -FS08000000 -FL0200000 -FP0($$Device:CT_Board_HS14_M0$Flash\STM32F4xx_2048.FLM)) + 0 + + + + + + + + + + + $$Device:CT_Board_HS14_M0$SVD\STM32F429x.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\build\ + strukt_code + 1 + 0 + 0 + 1 + 1 + .\build\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -MPU + DARMCM1.DLL + -pCM0 + SARMCM3.DLL + -MPU + TARMCM1.DLL + -pCM0 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M0" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x30000 + + + 1 + 0x8000000 + 0x200000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x200000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x30000 + + + 0 + 0x10000000 + 0x10000 + + + + + + 1 + 2 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 3 + 0 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 4 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + --diag_suppress 6314 + + + + + + + + Source Group 1 + + + adc.c + 1 + .\app\adc.c + + + struct_code.s + 2 + .\app\struct_code.s + + + + + ::Device + + + ::HAL + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\CT_Board_HS14_M0\datainit_ctboard.s + + + + + + + + RTE\Device\CT_Board_HS14_M0\startup_ctboard.s + + + + + + + + RTE\Device\CT_Board_HS14_M0\system_ctboard.c + + + + + + + + RTE\HAL\CT_Board_HS14_M0\hal_fmc.c + + + + + + + + RTE\HAL\CT_Board_HS14_M0\hal_gpio.c + + + + + + + + RTE\HAL\CT_Board_HS14_M0\hal_pwr.c + + + + + + + + RTE\HAL\CT_Board_HS14_M0\hal_rcc.c + + + + + + + + + + + + + <Project Info> + 0 + 1 + + + + +