commit 556d5bceb1b15d181a7a99897eaa07a31ac34789 Author: Schrom01 Date: Fri Oct 7 08:04:14 2022 +0200 initial commit diff --git a/CTP_AssemblyIntroduction_en.pdf b/CTP_AssemblyIntroduction_en.pdf new file mode 100644 index 0000000..8a07ae6 Binary files /dev/null and b/CTP_AssemblyIntroduction_en.pdf differ diff --git a/transbf/app/transbf.s b/transbf/app/transbf.s new file mode 100644 index 0000000..908121b --- /dev/null +++ b/transbf/app/transbf.s @@ -0,0 +1,115 @@ +; ------------------------------------------------------------------ +; -- _____ ______ _____ - +; -- |_ _| | ____|/ ____| - +; -- | | _ __ | |__ | (___ Institute of Embedded Systems - +; -- | | | '_ \| __| \___ \ Zurich University of - +; -- _| |_| | | | |____ ____) | Applied Sciences - +; -- |_____|_| |_|______|_____/ 8401 Winterthur, Switzerland - +; ------------------------------------------------------------------ +; -- +; -- main.s +; -- +; -- CT1 P03 Transferbefehle +; -- +; -- $Id: transbf.s 552 2014-09-01 15:06:12Z muln $ +; ------------------------------------------------------------------ +;Directives + PRESERVE8 + THUMB + +; ------------------------------------------------------------------ +; -- Symbolic Literals +; ------------------------------------------------------------------ +MY_CONST EQU 0x12 +ADDR_DIP_SWITCH_31_0 EQU 0x60000200 +ADDR_LED_31_0 EQU 0x60000100 + +; ------------------------------------------------------------------ +; -- Variables +; ------------------------------------------------------------------ + AREA MyAsmVar, DATA, READWRITE + +store_table SPACE 16 ; reserve 16 byte (4 words) + ALIGN + +; ------------------------------------------------------------------ +; -- Constants +; ------------------------------------------------------------------ + AREA MyAsmConst, DATA, READONLY + +addr_dip_switch DCD 0x60000200 +const_table DCD 0x01234567, 0x12345678, 0x99996666, 0x34567890 + ALIGN + +; ------------------------------------------------------------------ +; -- MyCode +; ------------------------------------------------------------------ + AREA MyCode, CODE, READONLY + +main PROC + EXPORT main + + ; MOV/MOVS instruction, loading constants + MOVS R1, #0xfe ; ***A1*** + MOV R10, R1 + MOVS R2, #MY_CONST + MOV R11, R2 ; ***A2*** + + ; load value of dip switches to R4 + LDR R3, =ADDR_DIP_SWITCH_31_0 ; ***A3*** + LDR R4, [R3] + + ; LDR literal, load value of addr_dip_switch to R7 + LDR R7, addr_dip_switch ; ***A4*** + LDR R0, [R7] + + ; write value of dip switches to LEDs + LDR R6, =ADDR_LED_31_0 + STR R0, [R6] + + ; LDR pseudo instruction, load address of addr_dip_switch to R7 + LDR R7, =addr_dip_switch ; ***A5*** + LDR R0, [R7] + + ; write address of dip switches to LEDs + LDR R6, =ADDR_LED_31_0 + STR R0, [R6] + + ; read values from const_table + LDR R7, =const_table + LDR R0, [R7] + LDR R1, [R7, #4] ; ***A6*** + MOVS R6, #8 + LDR R2, [R7, R6] + MOVS R6, #12 + LDR R3, [R7, R6] ; ***A7*** + + ; write values to store_table + LDR R7, =store_table + STR R0, [R7] + STR R1, [R7,#4] + MOVS R6, #8 + STR R2, [R7,R6] + MOVS R6, #12 + STR R3, [R7,R6] + + ; write third value from store_table to leds + MOVS R1, #8 + LDR R7, =store_table + LDR R0, [R7, R1] + LDR R6, =ADDR_LED_31_0 + STR R0, [R6] + + ; load multiple registers from memory + LDR R0, =const_table + LDM R0!, {R4, R5, R6, R7} + + B main + + ALIGN + +; ------------------------------------------------------------------ +; End of code +; ------------------------------------------------------------------ + ENDP + END diff --git a/transbf/transbf.uvoptx b/transbf/transbf.uvoptx new file mode 100644 index 0000000..88e8485 --- /dev/null +++ b/transbf/transbf.uvoptx @@ -0,0 +1,241 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc; *.md + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + Target 1 + 0x4 + ARM-ADS + + 180000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\build\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0) + + + 0 + ST-LINKIII-KEIL_SWO + -U-O206 -O8398 -S0 -C0 -A0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_2048.FLM -FS08000000 -FL0200000 -FP0($$Device:CT_Board_HS14_M0$Flash\STM32F4xx_2048.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_2048 -FS08000000 -FL0200000 -FP0($$Device:CT_Board_HS14_M0$Flash\STM32F4xx_2048.FLM)) + + + + + + 1 + 0 + 0x08001254 + 0 + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + app + 1 + 0 + 0 + 0 + + 1 + 1 + 2 + 0 + 0 + 0 + .\app\transbf.s + transbf.s + 0 + 0 + + + + + ::Device + 0 + 0 + 0 + 1 + + + + ::HAL + 0 + 0 + 0 + 1 + + + diff --git a/transbf/transbf.uvprojx b/transbf/transbf.uvprojx new file mode 100644 index 0000000..6198c07 --- /dev/null +++ b/transbf/transbf.uvprojx @@ -0,0 +1,519 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + Target 1 + 0x4 + ARM-ADS + 6180000::V6.18::ARMCLANG + 6180000::V6.18::ARMCLANG + 1 + + + CT_Board_HS14_M0 + STMicroelectronics + InES.CTBoard14_DFP.4.0.2 + https://ennis.zhaw.ch/pack/ + IROM(0x08000000,0x200000) IRAM(0x20000000,0x30000) IRAM2(0x10000000,0x10000) CPUTYPE("Cortex-M0") CLOCK(180000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_2048 -FS08000000 -FL0200000 -FP0($$Device:CT_Board_HS14_M0$Flash\STM32F4xx_2048.FLM)) + 0 + + + + + + + + + + + $$Device:CT_Board_HS14_M0$SVD\STM32F429x.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\build\ + transbf + 1 + 0 + 0 + 1 + 1 + .\build\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -MPU + DARMCM1.DLL + -pCM0 + SARMCM3.DLL + -MPU + TARMCM1.DLL + -pCM0 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + "Cortex-M0" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x30000 + + + 1 + 0x8000000 + 0x200000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x200000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x30000 + + + 0 + 0x10000000 + 0x10000 + + + + + + 1 + 2 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 3 + 0 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 4 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + --diag_suppress 6314 + + + + + + + + app + + + transbf.s + 2 + .\app\transbf.s + + + + + ::Device + + + ::HAL + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\CT_Board_HS14_M0\datainit_ctboard.s + + + + + + + + RTE\Device\CT_Board_HS14_M0\startup_ctboard.s + + + + + + + + RTE\Device\CT_Board_HS14_M0\system_ctboard.c + + + + + + + + RTE\HAL\CT_Board_HS14_M0\hal_fmc.c + + + + + + + + RTE\HAL\CT_Board_HS14_M0\hal_gpio.c + + + + + + + + RTE\HAL\CT_Board_HS14_M0\hal_pwr.c + + + + + + + + RTE\HAL\CT_Board_HS14_M0\hal_rcc.c + + + + + + + + + + + + + <Project Info> + 0 + 1 + + + + +